Reference : Zero-Bias Si Backward Diodes Detectors Incorporating P and B δ-Doping Layers Grown by...
Scientific congresses and symposiums : Paper published in a book
Engineering, computing & technology : Electrical & electronics engineering
http://hdl.handle.net/2268/69116
Zero-Bias Si Backward Diodes Detectors Incorporating P and B δ-Doping Layers Grown by Chemical Vapor Deposition
English
Park, Si-Young [Ohio State University > Department of Electrical and Computer Engineering > > >]
Anisha, Ramesh [Ohio State University > Department of Electrical and Computer Engineering > > >]
Berger, Paul [Ohio State University > Department of Electrical and Computer Engineering and Department of Physics > > >]
Loo, Roger [IMEC > > > >]
Nguyen, Ngoc Duy mailto [IMEC > > > >]
Takeuchi, Shotaro [IMEC > > > >]
Goossens, Jozefien [IMEC > > > >]
Caymax, Matty [IMEC > > > >]
2009
International Semiconductor Device Research Symposium, 2009
IEEE
Yes
International
978-1-4244-6030-4
Los Alamitos
USA
International Semiconductor Device Research Symposium, 2009
9-11/12/2009
University of Maryland
College Park
USA
[en] Detector ; Si diode ; Delta-doping ; CVD
[en] For the first time, CVD-grown Si only backward diode detectors incorporating ¿doping planes were demonstrated. The best performance of curvature coefficient of 16 V-1 with a junction resistance of 14 k¿ was shown. By the successful technology transfer from LT-MBE to CVD, the eventual placement of optimized CVD-grown detectors monolithically integrated with 300 mm CMOS platform to fabricate large area focal plane arrays with low cost is now possible.
Researchers ; Professionals
http://hdl.handle.net/2268/69116
10.1109/ISDRS.2009.5378255

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