Reference : Selective epitaxial growth of III-V semiconductor heterostructures on Si substrates for ...
Scientific journals : Article
Engineering, computing & technology : Materials science & engineering
http://hdl.handle.net/2268/69092
Selective epitaxial growth of III-V semiconductor heterostructures on Si substrates for logic applications
English
Nguyen, Ngoc Duy mailto [Université de Liège - ULg > Département de physique > Physique des solides, interfaces et nanostructures >]
Wang, Gang [IMEC > > > > > >]
Brammertz, Guy [IMEC > > > > > >]
Leys, Maarten [IMEC > > > > > >]
Waldron, Niamh [IMEC > > > > > >]
Winderickx, Gillis [IMEC > > > > > >]
Lismont, Kevin [IMEC > > > > > >]
Dekoster, Johan [IMEC > > > > > >]
Loo, Roger [IMEC > > > > > >]
Meuris, Marc [IMEC > > > > > >]
Degroote, Stefan [IMEC > > > > > >]
Buttita, Francesco [AIXTRON AG > > > > > >]
O'Neil, Barry [AIXTRON AG > > > > > >]
Féron, Olivier [AIXTRON AG > > > > > >]
Lindner, Johannes [AIXTRON AG > > > > > >]
Schulte, Frank [AIXTRON AG > > > > > >]
Schineller, Bernd [AIXTRON AG > > > > > >]
Heuken, Michael [AIXTRON AG > > > > > >]
Caymax, Matty [IMEC > > > >]
2010
ECS Transactions
ECS
33
933
Yes
International
1938-5862
1938-6737
Pennington
USA
[en] Selective epitaxial growth ; III-V ; CMOS
[en] We have deposited III-V alloys on 200 mm Si miscut wafers with an oxide pattern. The selective epitaxial growth (SEG) of GaAs in large windows defined by SiO2 lines on a thick strained-relaxed Ge buffer layer served as a test vehicle which allowed us to demonstrate the integration of a III-V material deposition process step in a Si manufacturing line using an industrial reactor. High quality GaAs layers with high wafer-scale thickness uniformity were achieved. In a subsequent step, SEG of InP was successfully performed on wafers with a 300 nm shallow trench isolation pattern. The seed layer morphology depended on the treatment of the Ge surface and on the growth temperature. The orientation of the trench with respect to the substrate miscut direction had an impact on the quality of the InP filling. Despite of the challenges, such an approach for the integration of III-V materials on Si substrates allowed us to obtain extended-defect-free epitaxial regions suitable for the fabrication of high-performance devices.
Researchers ; Professionals
http://hdl.handle.net/2268/69092
10.1149/1.3487625
http://dx.doi.org/10.1149/1.3487625

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