References of "Zaima, Shigeaki"
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See detailElectrical Activity of Threading Dislocations and Defect Complexes in GeSn Epitaxial Layers
Gupta, Somya; Simoen, Eddy; Asano, Takanori et al

Conference (2013, June 04)

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See detailImpedance Spectroscopy of GeSn-based Heterostructures
Baert, Bruno ULg; Nakatsuka, Osamu; Zaima, Shigeaki et al

in ECS Transactions (2013), 50(9), 481-490

In this work, we investigated the electrical characteristics of p-GeSn/p-Ge and p-GeSn/n-Ge structures obtained by simulation of the basic semiconductor equations. We developed a numerical formalism based ... [more ▼]

In this work, we investigated the electrical characteristics of p-GeSn/p-Ge and p-GeSn/n-Ge structures obtained by simulation of the basic semiconductor equations. We developed a numerical formalism based on a drift-diffusion model including a trap level and applied it to typical GeSn-based heterostructures by focusing on the electrical response under small-signal alternating current regime. The results demonstrate that our method provides an access to both microscopic and macroscopic properties, and thereon, to a physical interpretation of the electrical characteristics of GeSn-based structures by linking measurable quantities to micro-scale variations in the structures. [less ▲]

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See detailImpedance spectroscopy of GeSn/Ge heterostructures by a numerical method
Baert, Bruno ULg; Nakatsuka, Osamu; Zaima, Shigeaki et al

in 222nd ECS Meeting, 2012 (2012)

In this work, we investigated the electrical characteristics of p-GeSn/p-Ge and p-GeSn/n-Ge structures obtained by simulation of the semiconductor equations. We developed a numerical formalism based on a ... [more ▼]

In this work, we investigated the electrical characteristics of p-GeSn/p-Ge and p-GeSn/n-Ge structures obtained by simulation of the semiconductor equations. We developed a numerical formalism based on a drift-diffusion model including a trap level and applied it to typical GeSn-based heterostructures by focusing on the electrical response under small-signal alternating current regime. The results demonstrate that our method provides an access to both microscopic and macroscopic properties, and thereon, to a physical interpretation of the electrical characteristics of GeSn-based structures by linking measurable quantities to micro-scale variations in the structures. [less ▲]

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See detailUse of p- and n-type vapor phase doping and sub-melt laser anneal for extension junctions in sub-32 nm CMOS technology
Nguyen, Ngoc Duy ULg; Rosseel, Erik; Takeuchi, Shotaro et al

in Thin Solid Films (2009), 518(6), 48

We evaluated the combination of vapor phase doping and sub-melt laser anneal as a novel doping strategy for the fabrication of source and drain extension junctions in sub-32 nm CMOS technology, aiming at ... [more ▼]

We evaluated the combination of vapor phase doping and sub-melt laser anneal as a novel doping strategy for the fabrication of source and drain extension junctions in sub-32 nm CMOS technology, aiming at both planar and non-planar device applications. High quality ultra shallow junctions with abrupt profiles in Si substrates were demonstrated on 300 mm Si substrates. The excellent results obtained for the sheet resistance and the junction depth with boron allowed us to fulfill the requirements for the 32 nm as well as for the 22 nm technology nodes in the PMOS case by choosing appropriate laser anneal conditions. For instance, using 3 laser scans at 1300 $\,^ rc$C, we measured an active dopant concentration of about 2.1 × 1020 cm− 3 and a junction depth of 12 nm. With arsenic for NMOS, ultra shallow junctions were achieved as well. However, as also seen for other junction fabrication schemes, low dopant activation level and active dose (in the range of 1--4 × 1013 cm− 2) were observed although dopant concentration versus depth profiles indicate that the dopant atoms were properly driven into the substrate during the anneal step. The electrical deactivation of a large part of the in-diffused dopants was responsible for the high sheet resistance values. [less ▲]

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