References of "Nguyen, Ngoc Duy"
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See detailStrained silicon on wafer level by wafer bonding: materials processing, strain measurements and strain relaxation
Reiche, M.; Moutanabbir, O.; Himcinschi, C. et al

in ECS Transactions (2008), 16

Different methods to introduce strain in thin silicon device layers are presented. Uniaxial strain is introduced in CMOS devices by process-induced stressors allowing the local generation of tensile or ... [more ▼]

Different methods to introduce strain in thin silicon device layers are presented. Uniaxial strain is introduced in CMOS devices by process-induced stressors allowing the local generation of tensile or compressive strain in the channel region of MOSFETs. Biaxial strain is introduced by growing thin silicon layer on SiGe buffer and transferring it to an oxidized silicon substrates. The latter forms strained silicon on insulator (SSOI) wafer characterized by tensile strain only. Future CMOS device technologies require the combination of the global strain of SSOI substrates with local stressors to increase the device performance. [less ▲]

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See detailImprovement of He ion induced SiGe layer relaxation by a thin Si:C layer
Buca, D.; Trinkaus, H.; Holländer, B. et al

Conference (2008)

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See detailConformal ultra shallow junctions by vapor phase doping with boron
Nguyen, Ngoc Duy ULg; Leys, Frederik; Takeuchi, Shotaro et al

Poster (2008)

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See detailAtomic layer doping of phosphorus and arsenic: experimental and atomistic modeling
Takeuchi, Shotaro; Yang, Lijun; Nguyen, Ngoc Duy ULg et al

Poster (2008)

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See detailVapor phase doping with N-type dopant into silicon by atmospheric pressure chemical vapor deposition
Takeuchi, Shotaro; Nguyen, Ngoc Duy ULg; Leys, Frederik et al

in 214th ECS Meeting, 2008 (2008)

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See detailStrained silicon on wafer level by wafer bonding: materials processing, strain measurements and strain relaxation
Reiche, M.; Moutanabbir, O.; Himcinschi, C. et al

Conference (2008)

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See detailHeavy n-type doping of SiGe for SIMS calibration
Nguyen, Ngoc Duy ULg

Report (2007)

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See detailDetermination of charge carrier transport properties in organic devices by admittance spectroscopy : application to hole mobility in α-NPD
Nguyen, Ngoc Duy ULg; Schmeits, Marcel; Loebl, Hans-Peter

in Physical Review. B : Condensed Matter (2007), 75

Hole mobility in N,N′-diphenyl-N,N′-bis(1-naphtylphenyl)-1,1′-biphenyl-4,4′-diamine (α-NPD) is evaluated by electrical characterization in the ac regime. The frequency-dependent complex admittance and ... [more ▼]

Hole mobility in N,N′-diphenyl-N,N′-bis(1-naphtylphenyl)-1,1′-biphenyl-4,4′-diamine (α-NPD) is evaluated by electrical characterization in the ac regime. The frequency-dependent complex admittance and impedance of the structure consisting of the organic layer, grown by thermal evaporation, sandwiched by indium tin oxide and aluminum electrodes, are measured as functions of the applied dc voltage. The capacitance response shows negative values for frequencies below a characteristic value depending on the bias and ranging from 0.1 Hz up to 20 Hz. It increases with the modulation frequency and reaches a peak, the magnitude and position of which are functions of the applied voltage. For higher frequencies, a minimum can be observed before the capacitance increases again up to a constant value. A final decreasing occurs at frequency of 4×106 Hz. The analysis of the experimental data is performed by a detailed theoretical study of the steady-state and small-signal electrical characteristics of the device. Numerical calculations are based on the solution of the basic semiconductor equations for the system consisting of two electrodes connected by the semiconducting channel formed by the organic layer. The description explicitly includes a continuous distribution of trap density of states and a field-dependent carrier mobility. The spatially dependent charge carrier and occupied trap concentrations, as well as the various components to the total current density, are obtained for the dc and ac regimes and are analyzed for given bias and frequency. Based on a formalism used in the study of inorganic semiconductors, the results of the simulation show that the inductive contribution to the capacitance response originates from the modulation of the hole concentration in the organic material, leading to the corresponding carrier transit time. Moreover, the low-frequency behavior of the capacitance curves could be explained by the presence of a band of defect states which modifies the charge distribution within the organic layer and the injection of electrons from the cathode. We show that the latter contribution is also responsible for the negative values of the capacitance measured below 10 Hz. Good agreement is observed between the experimental and theoretical electrical characteristics, in particular for the differential susceptance results and the subsequent hole mobility values. Our approach can be a useful contribution for the methodology of obtaining mobilities from admittance measurements as it allows one to clarify the physical origin of the measured frequency-dependent capacitance and to check for the experimental procedure. This work finally leads to the formulation of the conditions under which small-signal ac measurements can be used to determine carrier mobility in organic devices. [less ▲]

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See detailFabrication, characterization, and modeling of strained SOI MOSFETs with very large effective mobility
Driussi, F.; Esseni, D.; Selmi, L. et al

in IEEE (Ed.) 37th European Solid State Device Research Conference (ESSDERC) (2007)

Strained silicon on insulators (sSOI) wafers with a supercritical thickness of 58 nm were produced using thin strain relaxed SiGe buffer layers, wafer bonding, selective etch back and epitaxial overgrowth ... [more ▼]

Strained silicon on insulators (sSOI) wafers with a supercritical thickness of 58 nm were produced using thin strain relaxed SiGe buffer layers, wafer bonding, selective etch back and epitaxial overgrowth. Raman spectroscopy revealed an homogeneous strain of 0.63 plusmn 0.03 % in the strained Si layer. Long channel n-type SOI-MOSFETs showed very large electron mobilities up to 1200 cm2/Vs in the strained Si devices. These values are more than two times larger than those of reference SOI n-MOSFETs. Mobility simulations with state of the art scattering models are then used to interpret the experiments. [less ▲]

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See detailStrained silicon-on-insulator - Fabrication and characterization
Reiche, M.; Himcinschi, C.; Gösele, U. et al

in 211th ECS Meeting, 2007 (2007)

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See detailIn-line characterization of heterojunction bipolar transistor base layers by high-resolution x-ray diffraction
Nguyen, Ngoc Duy ULg; Loo, R.; Hikavyy, A. et al

in ECS Transactions (2007), 10

The suitability of high-resolution X-ray diffraction (HRXRD) as an in-line measurement tool for the characterization of heterojunction bipolar transistor SiGe base layers and Si cap layers was ... [more ▼]

The suitability of high-resolution X-ray diffraction (HRXRD) as an in-line measurement tool for the characterization of heterojunction bipolar transistor SiGe base layers and Si cap layers was investigated. We showed that despite of polycrystalline Si on the mask material of patterned wafers, HRXRD measurements performed on an array of small windows yield results which are comparable to those that were obtained on a window which is larger than the size of the source beam, regarding the thickness and the Ge content of the SiGe layers. The possibility to extract layer parameters for active device windows of different sizes was therefore demonstrated. The suitability of HRXRD for in-line measurement of the Si cap thickness was also assessed and the sensitivity of this technique for determining the substitutional boron concentration in SiGe was studied. The detection limit in the monitoring of the active dopant concentration was about 2.7 × 1019 cm-3. [less ▲]

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See detailStrained silicon-on-insulator - Fabrication and characterization
Reiche, M.; Himcinschi, C.; Gösele, U. et al

in ECS Transactions (2007), 6

SSOI substrates were successfully fabricated using He+ ion implantation and annealing to relax thin (< 500nm) SiGe buffer layers, bonding and layer transfer processes to realize strained-Si layers onto ... [more ▼]

SSOI substrates were successfully fabricated using He+ ion implantation and annealing to relax thin (< 500nm) SiGe buffer layers, bonding and layer transfer processes to realize strained-Si layers onto oxide layers. The reduced thickness of the SiGe buffer possess numerous advantages such as reduced process costs for epitaxy and for reclaim of the handle wafer if the layer splitting is initiated in the SiGe/Si interface. The electron mobilities in the fabricated SSOI layers were measured using transistors with different gate lengths. An electron mobility of ~530 cm2 /Vs was extracted, being much higher than in non-strained SOI substrates. Furthermore, an 80% drive current (IDSAT) improvement has been measured for long channel devices. [less ▲]

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See detailLarge current enhancement in n-MOSFETs with strained Si on insulator
Mantl, S.; Buca, D.; Zhao, Q. et al

in International Semiconductor Device Research Symposium, 2007 (2007)

As scaling of the critical transistor dimensions below 65 nm has been slowed down, the implementation of novel materials, especially high mobility channel materials is most attractive to boost the ... [more ▼]

As scaling of the critical transistor dimensions below 65 nm has been slowed down, the implementation of novel materials, especially high mobility channel materials is most attractive to boost the transistor performance. Applying strain to silicon has become a successful route. The electron mobility can be enhanced by biaxial strain introduced into Si by epitaxial growth of Si on a strain relaxed SiGe layer or by so called process induced methods applied directly on transistor level. The combination of strained Si and SOI is particularly promising due to the combination of the enhanced mobilities and the inherent advantages of SOI. First long channel n-MOSFETs with gate lengths of 5 to 50 mum and a 6.6 nm thick SiO2 gate dielectric were fabricated. For comparison, devices on unstrained SOI were made. The transfer characteristics of a fully depleted sSOI-MOSFET with a gate length of 5 mum and a gate width of 20 mum indicating an inverse sub-threshold slope of 75mV/dec. [less ▲]

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See detailStrained Si-on-insulator for advanced CMOS devices
Mantl, S.; Buca, D.; Zhao, Q. et al

Poster (2007)

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See detailLow-temperature chemical vapor deposition of highly-doped n-type epitaxial Si at high growth rate
Nguyen, Ngoc Duy ULg; Loo, Roger; Caymax, Matty

Conference (2007)

We investigated the growth of in-situ n-type doped epitaxial Si layers with arsenic and phosphorus by means of low-temperature chemical vapor deposition using trisilane as Si-precursor. Indeed, in order ... [more ▼]

We investigated the growth of in-situ n-type doped epitaxial Si layers with arsenic and phosphorus by means of low-temperature chemical vapor deposition using trisilane as Si-precursor. Indeed, in order to prevent the alteration of the characteristics of the devices which are already present on the wafer, an epitaxy process at low temperature is highly desired for applications such as BiCMOS. In this work, the varying parameters are the deposition temperature, the Si-precursor mass flow and the dopant gas flow. As a result, a process for the deposition of heavily doped epilayers was demonstrated at 600 °C with high deposition rate, which is important for maintaining high throughput and low process cost. We showed that using trisilane as a Si-precursor resulted in a much more linear n-type doping behavior than using dichlorosilane. Therefore it allowed an easier process control and a wider dynamic doping range. Our process is an interesting route for the epitaxy of a low-resistance emitter layer for bipolar transistor application. [less ▲]

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See detailEnhancement of the relaxation of SiGe layers by He ion implantation using a delta-Si:C layer
Buca, D.; Goryll, M.; Holländer, B. et al

Conference (2007)

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See detailAdmittance spectroscopy of semiconductor systems
Nguyen, Ngoc Duy ULg

Scientific conference (2006, September 11)

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