Vapor phase doping and sub-melt laser anneal for the fabrication of Si-based ultra-shallow junctions in sub-32 nm CMOS technologyNguyen, Ngoc Duy ; ; et alin International Semiconductor Device Research Symposium, 2009 (2009) The authors demonstrated that the combination of VPD and LA enables the fabrication of high quality, defect-free USJs with abrupt dopant profile. The results for PMOS with B-VPD are very promising for the ... [more ▼] The authors demonstrated that the combination of VPD and LA enables the fabrication of high quality, defect-free USJs with abrupt dopant profile. The results for PMOS with B-VPD are very promising for the 32 nm and the 22 nm technology nodes. In the case of NMOS, As-VPD and LA enable the fabrication of an USJ but the electrical deactivation of a large part of the in-diffused dopants is responsible for the high sheet resistance values. [less ▲] Detailed reference viewed: 24 (3 ULg) Vapor phase doping and sub-melt laser anneal for ultra-shallow extension junctions in sub-32 nm CMOS technologyNguyen, Ngoc Duy ; ; et alin Chiussi, S.; Alpuim, P.; Murota, J. (Eds.) et al SiNEP 2009. 1st International Workshop on Si based nano-electronics and -photonics (2009) Detailed reference viewed: 13 (0 ULg)![]() Si$_1-x$Ge$_x$ growth using Si$_3$H$_8$ by low temperature chemical vapor deposition; Nguyen, Ngoc Duy ; et alConference (2009) Detailed reference viewed: 7 (2 ULg) 200mm Si/SiGe Resonant Interband Tunneling Diodes Incorporating δ-Doping Layers Grown by CVD; ; et al Conference (2009) Detailed reference viewed: 14 (1 ULg)![]() SiGe tunnel field effect transistors: challenges for selective epitaxial growth; ; et al Conference (2009) Detailed reference viewed: 22 (2 ULg) Enhancement of the poly/mono growth rate ratio for BiCMOS applicationNguyen, Ngoc Duy ; Report (2008) Detailed reference viewed: 7 (0 ULg) Low-temperature epitaxy of highly-doped n-type Si at high growth rate by chemical vapor deposition for bipolar transistor applicationNguyen, Ngoc Duy ; ; in Applied Surface Science (2008), 264 We investigated the growth of in-situ n-type doped epitaxial Si layers with arsenic and phosphorus by means of low-temperature chemical vapor deposition using trisilane as Si-precursor. Indeed, in order ... [more ▼] We investigated the growth of in-situ n-type doped epitaxial Si layers with arsenic and phosphorus by means of low-temperature chemical vapor deposition using trisilane as Si-precursor. Indeed, in order to prevent the alteration of the characteristics of the devices which are already present on the wafer, an epitaxy process at low temperature is highly desired for applications such as BiCMOS. In this work, the varying parameters are the deposition temperature, the Si-precursor mass flow and the dopant gas flow. As a result, a process for the deposition of heavily doped epilayers was demonstrated at 600 °C with high deposition rate, which is important for maintaining high throughput and low process cost. We showed that using trisilane as a Si-precursor resulted in a much more linear n-type doping behavior than using dichlorosilane. Therefore it allowed an easier process control and a wider dynamic doping range. Our process is an interesting route for the epitaxy of a low-resistance emitter layer for bipolar transistor application. [less ▲] Detailed reference viewed: 17 (3 ULg) Vapor phase doping: an atomic layer deposition approach to n-type doping in classical chemical vapor deposition epitaxy; Nguyen, Ngoc Duy ; et alConference (2008) Detailed reference viewed: 11 (1 ULg) Conformal doping of FINFET's : a fabrication and metrology challenge; ; et al Conference (2008) Detailed reference viewed: 35 (0 ULg) Vapor phase doping with N-type dopant into silicon by atmospheric pressure chemical vapor deposition; Nguyen, Ngoc Duy ; et alin ECS Transactions (2008), 16 Atomic layer doping of phosphorus (P) and arsenic (As) into Si was performed using the vapor phase doping (VPD) technique. For increasing deposition time and precursor gas flow rate, the P and As doses ... [more ▼] Atomic layer doping of phosphorus (P) and arsenic (As) into Si was performed using the vapor phase doping (VPD) technique. For increasing deposition time and precursor gas flow rate, the P and As doses tend to saturate at about 0.8 and 1.0 monolayer of Si, respectively. Therefore, these processes are self-limited in both cases. When a Si cap layer is grown on the P-covered Si(001), high P concentration of 3.7 × 1020 cm-3 at the heterointerface in the Si- cap/P/Si-substrate layer stacks is achieved. Due to As desorption and segregation toward the Si surface during the temperature ramp up and during the Si-cap growth, the As concentration at the heterointerface in the Si-cap/As/Si-substrate layer stacks was lower compared to the P case. These results allowed us to evaluate the feasibility of the VPD process to fabricate precisely controlled doping profiles. [less ▲] Detailed reference viewed: 34 (2 ULg) Conformal ultra shallow junctions by vapor phase doping with boronNguyen, Ngoc Duy ; ; et alPoster (2008) Detailed reference viewed: 20 (1 ULg) Atomic layer doping of phosphorus and arsenic: experimental and atomistic modeling; ; Nguyen, Ngoc Duy et alPoster (2008) Detailed reference viewed: 10 (1 ULg) Vapor phase doping with N-type dopant into silicon by atmospheric pressure chemical vapor deposition; Nguyen, Ngoc Duy ; et alin 214th ECS Meeting, 2008 (2008) Detailed reference viewed: 8 (2 ULg) Low-temperature chemical vapor deposition of highly-doped n-type epitaxial Si at high growth rateNguyen, Ngoc Duy ; ; Conference (2007) We investigated the growth of in-situ n-type doped epitaxial Si layers with arsenic and phosphorus by means of low-temperature chemical vapor deposition using trisilane as Si-precursor. Indeed, in order ... [more ▼] We investigated the growth of in-situ n-type doped epitaxial Si layers with arsenic and phosphorus by means of low-temperature chemical vapor deposition using trisilane as Si-precursor. Indeed, in order to prevent the alteration of the characteristics of the devices which are already present on the wafer, an epitaxy process at low temperature is highly desired for applications such as BiCMOS. In this work, the varying parameters are the deposition temperature, the Si-precursor mass flow and the dopant gas flow. As a result, a process for the deposition of heavily doped epilayers was demonstrated at 600 °C with high deposition rate, which is important for maintaining high throughput and low process cost. We showed that using trisilane as a Si-precursor resulted in a much more linear n-type doping behavior than using dichlorosilane. Therefore it allowed an easier process control and a wider dynamic doping range. Our process is an interesting route for the epitaxy of a low-resistance emitter layer for bipolar transistor application. [less ▲] Detailed reference viewed: 11 (0 ULg) |
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